Brandon Myers - Architecture and Organization
Brandon Myers (brandon-d-myers@uiowa.edu) is Lecturer in Computer Science at the University of Iowa. These activities were developed for Architecture and Organization, with support from an ACM Special Projects Award.
For full versions, click here.
Stage | Activity Name |
---|---|
2: Piloted | Bits & Numbers |
2: Piloted | Memory Organization of Programs |
2: Piloted | Stored Programs |
2: Piloted | Procedure Calls |
2: Piloted | Combinational Logic |
2: Piloted | Adders & Delay |
2: Piloted | Adders, Shifters, Multipliers |
2: Piloted | Sequential Logic |
2: Piloted | Addressable Memory & the Add Instruction |
2: Piloted | Engineering Digital Systems |
Clif Kussmaul - Architecture and Organization
These activities were developed by Clif Kussmaul for Architecture and Organization using Computer Systems: A Programmer’s Perspective (3E) by Bryant and O’Hallaron. As such, some of them (e.g. Code Reps) focus on the x86-64 architecture.
For sample versions, click here. For full access, contact Clif Kussmaul.
Stage | Activity Name | Notes |
---|---|---|
2: Piloted | Intro to C I: Basic Syntax | preprocessor, text I/O |
2: Piloted | Intro to C II: Pointers | addresses, pointers, arrays, strings, |
2: Piloted | Intro to C III: Structures | malloc, structures |
- - - - - - - - - - | ||
2: Piloted | Data Reps I: Bits | bits & bytes, number systems, C types & operators, text, instructions |
2: Piloted | Data Reps II: Integers | signed & unsigned, C types, casting, operations |
2: Piloted | Data Reps III: Floats | |
- - - - - - - - - - | ||
2: Piloted | Code Reps I: Architecture | abstraction, hardware, storage hierarchy, etc |
2: Piloted | Code Reps II: Steps & Files | preprocess, compile, assemble, link |
2: Piloted | Code Reps III: Addressing | registers, direct, indirect, scaled index, etc |
2: Piloted | Code Reps IV: Assembly | format, suffixes, moves, arith & logic, etc |
2: Piloted | Code Reps V: Control Flow | condition codes, jumps, conditional momves |
2: Piloted | Code Reps VI: Control Structures | not (yet) POGIL - shows control structures in C, assembly, and “assembly equivalent C” |
2: Piloted | Code Reps VII: Function Calls | calls, activation records, register mgmt |
2: Piloted | Code Reps VIII: Machine Code | short activity |
Mark Gondree - Architecture and Organization
These activities were developed by Mark Gondree for Architecture and Organization. They focus on the 32-bit ARM architecture, and are based on activities by Clif Kussmaul.
For full access, click here.
Stage | Activity Name | Notes |
---|---|---|
2: Piloted | Data Reps I: Bits | bits & bytes, number systems, C types & operators, text, instructions |
2: Piloted | Data Reps II: Integers | signed & unsigned, C types, casting, operations |
2: Piloted | Combinatorial Logic - Adders | ripple-carry adders |
- - - - - - - - - - | ||
2: Piloted | Code Reps I: Architecture | abstraction, hardware, storage hierarchy, etc |
2: Piloted | Code Reps II: Steps & Files (ARM) | preprocess, compile, assemble, link |
2: Piloted | Code Reps III: Addressing (ARM) | registers, direct, indirect, scaled index, etc |
2: Piloted | Code Reps V: Control Flow (ARM) | condition codes, jumps, conditional momves |
Matt Lang - Architecture and Organization
These activities were developed by Matt Lang for Architecture and Organization.
For full versions, click here. For details, contact Clif Kussmaul.
Stage | Activity Name |
---|---|
2: Piloted | ORG_02_TWOS: Twos Complement Representations |
2: Piloted | ORG_03_BIT: Bitwise Operations |
2: Piloted | ORG_04_MOVE: Data Movement |
2: Piloted | ORG_05_ARITH: Arithmetic Operations |
2: Piloted | ORG_06_LOOP: Loops |
2: Piloted | ORG_07A_PROC: Procedures |
2: Piloted | ORG_07B_PROC: Procedures |
2: Piloted | OS_LO: Loop Optimization |
Piotr Debiec - Digital Systems
These activities were developed by Piotr Debiec at Lodz University of Technology (Poland) and Clif Kussmaul for Digital Systems. For full versions, contact Piotr Debiec via email.
Stage | Activity Name |
---|---|
2: Piloted | Gates and Truth Tables |
2: Piloted | Plexers (Decoder, Mux, DeMux) |
2: Piloted | Mux-Based Realizations |
2: Piloted | Minterms, Maxterms, and Canonical Forms |
2: Piloted | Minimization with Don’t Care States |
2: Piloted | Integer Representations |
2: Piloted | Adding, Subtracting, and Flags |
2: Piloted | Comparators |
Other Activities
Some Architecture and Organization courses might use these CS Principles activities:
Brent Gray - CS Principles
Tammy Pirmann - CS Principles
These activities were developed by Tammy Pirmann for CS Principles.
For sample versions, click here. For full access, contact Clif Kussmaul.
Stage | Activity Name |
---|---|
3: Refined | Hardware Abstraction 1: What is a Computer? |
3: Refined | Hardware Abstraction 2: Logic Gates |
3: Refined | Number Systems 1: Decimal and Hex |
3: Refined | Number Systems 2: Binary |